Hardware-Components for Runtime Monitoring
Session Chair: Silvia Lizeth Tapia Tarifa
In this presentation, we give an overview over hardware-level event sources, such as processor tracing facilities, and how to integrate them into applications, in particular monitoring approaches. Secondly, we discuss approaches to processing events in hardware on FPGAs of Systems-on-Chips or accelerator cards. We conclude with an in-depth look at an integrated approach that generates hardware- and middleware-components for reconfigurable monitors from the high-level specification language TeSSLa. The synthesized specification is then deployed onto an FPGA, and, together with a corresponding generated software-based monitor, realises a hardware-assisted approach to detection of data races in e.g. C-programs.